[BBC-Micro] EPROM versus ROM for BBC/B OS1.2

Peter Coghlan bbcmicro at beyondthepale.ie
Fri Apr 17 00:01:44 BST 2015

> Thank you all for your suggestions and info especially Peter Coghlan who in my
> opinion was very observant and accurate in his analysis. Thanks also to Mark
> for reminding me about 4 ROM images and not 3 as I stated in each position
> and then  using combi-ROM. Also a 32K RAM chip at the rightmost socket... as 
> SWR.
> Well, I now got it working... like Peter stated, only difference from 
> leftmost socket (were the OS sits) from all the others was pin 1 & 27. I found
> from datasheet of the original OS MaskRom HN613128 that pin 1 was not
> connected (NC). Pin 1 of the EPROM I used, an M27128A-2F1 was Vpp (Program
> supply). I bent slightly this pin sideways  before inserting the chip into
> 1st (OS) socket so that no contact was made and found that now the beeb
> powered-up and worked as usual.... hurray!

Great stuff - good to hear you have it working now.  I would suggest you link
the bent out pin 1 over to pin 28 as the data sheet says it should be connected
to Vcc and it might not be good to leave it floating.

> What I do not understand is why it effected the chip as when I traced (OS) 
> socket pin 1 on schematic I found this only went  to a quad OR gate input
> namely IC29 (74LS32) pin 4. Now why did it effect the EPROM chip with only
> pin 4 of IC29 being an input?

My schematic shows pin 1 on the OS socket connected to A15 which goes to IC29
pin 4 and also to a few other places including pin 25 on IC1, the 6502 CPU.
The CPU should be driving this line high whenever the OS is accessed (because
the OS is in the top half of the memory).

Going back to the EPROM data sheet, it suggests that in read mode, the EPROM
will draw Ipp = 5mA through pin 1.  This sounds a bit high.  Maybe it is
dragging down the level on A15 when it is connected and this is the cause of
the problem? On the other hand, if pin 1 is disconnected and the EPROM is
unable to draw 5mA through it, I would have thought that the EPROM would then
not function, unless this 5mA is not actually required for anything, in which
case, why does the data sheet require that pin to be connected to Vcc?  Strange.

In the case of the paged ROMS, it appears from my schematic that pin 1 of the
sockets is not connected to anything so if this is the correct diagnosis, it
looks likely that the problem would not arise for paged ROMs, only the OS.

> Also, why did they connect this pin knowing that the OS MaskROM chip did not
> use pin 1 it being NC??

Having A15 on pin 1 and A14 on pin 27 would be compatible with a 27512 but it's
hard to see how this would be useful as only a quarter of it could be accessed
without further changes.  Linking the NE pin of S21 to 0V would allow the 27512
to take over the entire 64K memory map (except for the I/O areas) but why would
anyone want to do that as the machine would be very limited with no RAM
accessible?  Even if (slower) paged RAM was provided on the 1MHz bus, there
would still be no access to the stack, page zero and the screen making the
machine almost useless.  Some minor changes around IC21 might allow the OS
image plus a single paged ROM image to be held in the 27512 with only half of
it wasted but this doesn't seem like a very useful thing to do either.

Maybe it was just felt to just be a good place to route all the address lines
where they could be picked up by an adapter board plugged into the OS ROM
socket or something like that?  On the other hand, other very useful signals
such as R/W- are not present there.

Maybe someone else knows what the original designers were thinking of here?

> Anyway guys, thank you all for your replies and support I appreciate it a 
> lot and apologize for my pehaps..... not so good explanation .

I'm glad that you've made progress with the problem.  Your explanation was fine.

Peter Coghlan

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